Searched refs:EEPROM (Results 1 – 25 of 66) sorted by relevance
123
| /u-boot/drivers/w1-eeprom/ |
| A D | Kconfig | 2 # EEPROM subsystem configuration 5 menu "1-wire EEPROM support" 16 bool "Enable Maxim DS24 families EEPROM support" 19 Maxim DS24 EEPROMs 1-Wire EEPROM support 35 bool "Enable sandbox onewire EEPROM driver" 38 Sandbox driver for a onewire EEPROM memory
|
| /u-boot/examples/standalone/ |
| A D | README.smc91111_eeprom | 137 LAN91C111 EEPROM <- Non-volatile 143 To set the EEPROM MAC address to 12:34:56:78:9A:BC 147 Writing EEPROM register 20 with 3412 150 Writing EEPROM register 21 with 7856 153 Writing EEPROM register 22 with bc9a 154 EEPROM contents copied to MAC 158 Current MAC Address in EEPROM 12:34:56:78:9a:bc 178 - D : Dump the LAN91C111 EEPROM contents 186 Current MAC Address in EEPROM 12:34:56:78:9a:bc 215 EEPROM contents copied to MAC [all …]
|
| A D | smc91111_eeprom.c | 23 #define EEPROM 0x1 macro 150 what = EEPROM; in smc91111_eeprom()
|
| /u-boot/board/davinci/da8xxevm/ |
| A D | Kconfig | 26 bool "MAC address in EEPROM" 31 EEPROM available. Enable this option to read the 32 MAC from the EEPROM
|
| /u-boot/board/ti/common/ |
| A D | Kconfig | 5 Evaluation Boards which have I2C based EEPROM detection 8 int "Board EEPROM's I2C bus address" 14 hex "Board EEPROM's I2C chip address"
|
| /u-boot/board/boundary/nitrogen6x/ |
| A D | 6x_upgrade.txt | 34 echo "Error re-reading EEPROM" ; 38 echo "Error reading boot loader from EEPROM" ; 41 echo "Error initializing EEPROM" ;
|
| /u-boot/doc/ |
| A D | I2C_Edge_Conditions | 5 and the CPU was reset. This may result in EEPROM data corruption. 18 The EEPROM sees: 22 4) device address "EEPROM interprets this as offset" 23 5) Offset in device, "EEPROM interprets this as data to write"
|
| A D | README.mpc85xx-sd-spi-boot | 10 When booting from an EEPROM, boot_format generates a binary image that is used 11 to boot from this EEPROM.
|
| /u-boot/doc/device-tree-bindings/w1-eeprom/ |
| A D | eep_sandbox.txt | 1 Onewire EEPROM sandbox driver device binding - one wire protocol sandbox EEPROM
|
| /u-boot/board/keymile/ |
| A D | Kconfig | 96 Identifier number of I2C bus, where the inventory EEPROM is connected to. 102 I2C address of the EEPROM containing the inventory. 108 Maximum length of inventory in EEPROM. 114 Page size of inventory in EEPROM.
|
| /u-boot/board/lego/ev3/ |
| A D | README | 11 The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0 12 of the SPI flash memory (with a size of 256KiB!). Because the EEPROM is read- 44 The EEPROM contains a program for uploading an image file to the flash memory. 54 IMPORTANT: The EEPROM bootloader only copies 256k, so u-boot.img must not
|
| /u-boot/board/gateworks/gw_ventana/ |
| A D | Kconfig | 18 Provides access to EEPROM configuration on Gateworks Ventana
|
| /u-boot/arch/mips/dts/ |
| A D | mrvl,octeon-ebb7304.dts | 100 u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */ 105 u-boot,dm-pre-reloc; /* Needed early for DDR SPD EEPROM */
|
| /u-boot/board/keymile/km83xx/ |
| A D | README.kmeter1 | 3 1. Alternative Boot EEPROM 6 configuration from a serial EEPROM. During the development and debugging
|
| /u-boot/board/freescale/mpc8349itx/ |
| A D | README | 11 A) One 8MB on-board flash EEPROM chip, instead of two. 29 E BOOT1 ON (0) Flash EEPROM boot device 31 G I2C-WP ON (0) I2C EEPROM write protection 32 H F_WP OFF (1) Flash EEPROM write protection 58 3.2 Flash EEPROM layout.
|
| /u-boot/board/freescale/ls1021atsn/ |
| A D | README.rst | 75 The boards contain an AT24 I2C EEPROM that is supposed to hold the MAC 76 addresses of the Ethernet interfaces, however the EEPROM comes blank out of 80 To write the MAC addresses to the EEPROM, the following needs to be done once::
|
| /u-boot/arch/arm/dts/ |
| A D | avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0.dts | 32 /* Microchip 24AA025E48T-I/OT: 2K I2C Serial EEPROM with EUI-48 */
|
| A D | socfpga_cyclone5_vining_fpga.dts | 179 i2c@6 { /* Backplane EEPROM */ 190 i2c@7 { /* Power board EEPROM */
|
| A D | s5p4418-nanopi2.dts | 50 /* NanoPi2: Header "CON2", NanoPC-T2: EEPROM (MAC-Addr.) and Audio */
|
| /u-boot/board/bachmann/ot1200/ |
| A D | README | 20 are making use of EDID data stored in an i2c EEPROM.
|
| /u-boot/arch/powerpc/dts/ |
| A D | kmsupm5.dts | 37 /* Inventory EEPROM of the unit itself */
|
| A D | kmsupc5.dts | 37 /* Inventory EEPROM of the unit itself */
|
| A D | kmtepr2.dts | 37 /* Inventory EEPROM of the unit itself */
|
| A D | kmopti2.dts | 37 /* Inventory EEPROM of the unit itself */
|
| /u-boot/drivers/misc/ |
| A D | Kconfig | 201 integrated 64-byte EEPROM, four programmable non-volatile I/O pins 391 hex "Chip address of the EEPROM device" 395 int "I2C bus of the EEPROM device." 399 int "Size in bytes of the EEPROM device" 406 The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS. 414 int "Length in bytes of the EEPROM memory array address" 420 hex "EEPROM Address Overflow" 423 EEPROM chips that implement "address overflow" are ones
|
Completed in 36 milliseconds
123