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Searched refs:EPU_EPCMPR5 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dconfig.h112 #define EPU_EPCMPR5 0x700060914ULL macro
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dsoc.c296 val = in_le32(EPU_EPCMPR5); in erratum_a009635()
297 writel(interval_mhz, EPU_EPCMPR5); in erratum_a009635()

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