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Searched refs:ESUB_AXI_DIV_DEBUG_ADDR (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/cpu/armv7/bcm235xx/
A Dclk-eth.c33 #define ESUB_AXI_DIV_DEBUG_ADDR (ESUB_CLK_BASE_ADDR + 0x00000E04) macro
108 writel((readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()
114 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()
116 writel(readl(ESUB_AXI_DIV_DEBUG_ADDR) | in clk_eth_enable()
118 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()
125 if (!(readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()
/u-boot/arch/arm/cpu/armv7/bcm281xx/
A Dclk-eth.c33 #define ESUB_AXI_DIV_DEBUG_ADDR (ESUB_CLK_BASE_ADDR + 0x00000E04) macro
108 writel((readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()
114 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()
116 writel(readl(ESUB_AXI_DIV_DEBUG_ADDR) | in clk_eth_enable()
118 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()
125 if (!(readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()

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