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Searched refs:FRAC_PLL_OUTPUT_DIV_VAL_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock_imx8mq.h328 #define FRAC_PLL_OUTPUT_DIV_VAL_MASK 0x1f macro
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mq.c68 divq_val = pll_cfg0 & FRAC_PLL_OUTPUT_DIV_VAL_MASK; in decode_frac_pll()

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