Searched refs:FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK (Results 1 – 4 of 4) sorted by relevance
386 #define FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK 0xFF000000 macro390 #define FSL_CHASSIS3_SRDS2_PRTCL_MASK FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK403 #define FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK 0x03E00000 macro409 #define FSL_CHASSIS3_SRDS2_PRTCL_MASK FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK
510 FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) in initialize_dpmac_to_slot()664 FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) in ls2080a_handle_phy_interface_sgmii()907 FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK) in board_eth_init()1066 srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; in board_fit_config_name_match()
470 FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; in board_eth_init()937 srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; in board_fit_config_name_match()
491 FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; in board_eth_init()954 srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK; in board_fit_config_name_match()
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