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Searched refs:FSL_SRDSCR2_OFFS (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc83xx/
A Dserdes.c28 #define FSL_SRDSCR2_OFFS 0x8 macro
61 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
63 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
88 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
91 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
111 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
114 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
133 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
136 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dmpc8536_serdes.c36 #define FSL_SRDSCR2_OFFS 0x8 macro
128 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
133 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
154 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
157 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
178 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
183 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
204 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
207 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()

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