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Searched refs:FSL_SRDSCR2_SEIC_MASK (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc83xx/
A Dserdes.c30 #define FSL_SRDSCR2_SEIC_MASK 0x00001c1c macro
89 tmp &= ~FSL_SRDSCR2_SEIC_MASK; in fsl_setup_serdes()
112 tmp &= ~FSL_SRDSCR2_SEIC_MASK; in fsl_setup_serdes()
134 tmp &= ~FSL_SRDSCR2_SEIC_MASK; in fsl_setup_serdes()

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