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Searched refs:FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/altera/
A Dsdram_agilex.c121 FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
A Dsdram_s10.c128 FW_MPU_DDR_SCR_WRITEL(0xFFFF0000, FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT); in sdram_mmr_init_full()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dfirewall.h118 #define FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT 0x18 macro

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