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Searched refs:FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/altera/
A Dsdram_agilex.c122 FW_MPU_DDR_SCR_WRITEL(0x1F, FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT); in sdram_mmr_init_full()
A Dsdram_s10.c129 FW_MPU_DDR_SCR_WRITEL(0x1F, FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT); in sdram_mmr_init_full()
/u-boot/arch/arm/mach-socfpga/include/mach/
A Dfirewall.h119 #define FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMITEXT 0x1c macro

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