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Searched refs:GCR_REV_CM3 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/include/asm/
A Dcm.h24 #define GCR_REV_CM3 0x0800 macro
/u-boot/arch/mips/lib/
A Dcache_init.S405 li t2, GCR_REV_CM3

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