Searched refs:GIC_PPI (Results 1 – 25 of 93) sorted by relevance
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/u-boot/arch/arm/dts/ |
A D | k3-am65.dtsi | 52 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */ 53 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */ 54 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */ 55 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */ 61 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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A D | hi6220.dtsi | 122 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 128 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 129 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 130 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 131 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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A D | k3-j7200.dtsi | 110 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */ 111 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */ 112 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */ 113 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */ 118 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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A D | s700.dtsi | 76 interrupts = <GIC_PPI 13 78 <GIC_PPI 14 80 <GIC_PPI 11 82 <GIC_PPI 10 110 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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A D | k3-j721e.dtsi | 111 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */ 112 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */ 113 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */ 114 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */ 120 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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A D | sun50i-h5.dtsi | 57 interrupts = <GIC_PPI 13 59 <GIC_PPI 14 61 <GIC_PPI 11 63 <GIC_PPI 10
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A D | keystone.dtsi | 46 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 53 <GIC_PPI 13 55 <GIC_PPI 14 57 <GIC_PPI 11 59 <GIC_PPI 10
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A D | s900.dtsi | 77 interrupts = <GIC_PPI 13 79 <GIC_PPI 14 81 <GIC_PPI 11 83 <GIC_PPI 10 117 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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A D | armada-ap806.dtsi | 98 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 136 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>, 137 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>, 138 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>, 139 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
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A D | rk3036.dtsi | 93 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 94 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 95 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 96 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 208 interrupts = <GIC_PPI 9 0xf04>;
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A D | mt7629.dtsi | 60 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 61 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 62 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 63 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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A D | sun8i-h3.dtsi | 125 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 126 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 127 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 128 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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A D | ls1021a.dtsi | 46 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 47 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 48 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 49 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 74 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
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A D | fsl-ls1028a.dtsi | 43 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | 55 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | 57 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | 59 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | 61 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
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A D | armada-37xx.dtsi | 80 interrupts = <GIC_PPI 13 82 <GIC_PPI 14 84 <GIC_PPI 11 86 <GIC_PPI 10
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A D | fsl-imx8-ca35.dtsi | 58 interrupts = <GIC_PPI 7
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A D | mt7622.dtsi | 70 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | 72 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | 74 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | 76 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) |
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A D | sun8i-v3s.dtsi | 88 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 89 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 90 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 91 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 547 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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A D | mt7623.dtsi | 92 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 93 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 94 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, 95 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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A D | meson-gx.dtsi | 189 interrupts = <GIC_PPI 13 191 <GIC_PPI 14 193 <GIC_PPI 11 195 <GIC_PPI 10 406 interrupts = <GIC_PPI 9
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A D | imx8mp.dtsi | 138 interrupts = <GIC_PPI 7 212 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 213 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 214 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 215 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 782 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
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A D | mt8518.dtsi | 34 interrupts = <GIC_PPI 9
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A D | omap5.dtsi | 89 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, 90 <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, 91 <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, 92 <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
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A D | hi3798cv200.dtsi | 71 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 73 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | 75 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 77 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
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/u-boot/include/dt-bindings/interrupt-controller/ |
A D | arm-gic.h | 13 #define GIC_PPI 1 macro
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