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Searched refs:GMII1_SEL_RMII (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/include/asm/arch-omap5/
A Dcpu.h123 #define GMII1_SEL_RMII 0x1 macro
126 #define GMII2_SEL_RMII (GMII1_SEL_RMII << 4)
130 #define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)
/u-boot/arch/arm/include/asm/arch-am33xx/
A Dcpu.h528 #define GMII1_SEL_RMII 0x1 macro
539 #define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)
/u-boot/board/isee/igep003x/
A Dboard.c285 writel((GMII1_SEL_RMII | RMII1_IO_CLK_EN), in board_eth_init()
/u-boot/board/vscom/baltos/
A Dboard.c462 writel((GMII1_SEL_RMII | GMII2_SEL_RGMII | RGMII2_IDMODE), &cdev->miisel); in board_eth_init()

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