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Searched refs:GPC_IMR1_CORE1 (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7/
A Dsoc.c33 #define GPC_IMR1_CORE1 0x40 macro
253 writel(~0, GPC_IPS_BASE_ADDR + GPC_IMR1_CORE1 + i * 4); in imx_gpcv2_init()

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