Searched refs:GPI (Results 1 – 3 of 3) sorted by relevance
| /u-boot/board/intel/cherryhill/ |
| A D | cherryhill.c | 89 GPIO_PAD_CONF("N15: GPIO_SUS0", GPIO, M1, GPI, NA, NA,
92 GPIO_PAD_CONF("N19: GPIO_SUS1", GPIO, M1, GPI, NA, NA,
95 GPIO_PAD_CONF("N24: GPIO_SUS2", GPIO, M1, GPI, NA, NA,
107 GPIO_PAD_CONF("N25: GPIO_SUS6", GPIO, M1, GPI, NA, NA,
111 GPIO_PAD_CONF("N18: GPIO_SUS7", GPIO, M1, GPI, NA, NA,
138 GPIO_PAD_CONF("N60: PANEL0_BKLTEN", GPIO, M1, GPI, NA, NA,
141 GPIO_PAD_CONF("N72: PANEL0_VDDEN", GPIO, M1, GPI, NA, NA,
162 GPIO_PAD_CONF("N23: SEC_GPIO_SUS8", GPIO, M1, GPI, NA, NA,
291 GPIO_PAD_CONF("SE77: GPIO_ALERT", GPIO, M1, GPI, NA, NA,
532 GPIO_PAD_CONF("SW80: SATA_GP3", GPIO, M2, GPI, LOW, NA,
[all …]
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| /u-boot/doc/device-tree-bindings/misc/ |
| A D | intel-lpc.txt | 15 - intel,gpi-routing : Specifies the GPI routing. There are 16 cells, valid
54 * GPI routing
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| /u-boot/arch/x86/include/asm/arch-braswell/ |
| A D | gpio.h | 53 GPI = 2, /* GPI, input only in PAD_VALUE */ enumerator
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