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Searched refs:GPIO_BANK0_REG_CLR_ADDR (Results 1 – 2 of 2) sorted by relevance

/u-boot/board/davinci/da8xxevm/
A Dda850evm.c350 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); in board_init()
/u-boot/arch/arm/mach-davinci/include/mach/
A Dhardware.h73 #define GPIO_BANK0_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x1c) macro

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