Searched refs:GPIO_CNTL (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/x86/include/asm/arch-ivybridge/
A D	pch.h	73 #define GPIO_CNTL 0x4C /* LPC GPIO Control Register */ macro 96 #define GPIO_CNTL 0x4C /* LPC GPIO Control Register */ macro
/u-boot/arch/x86/include/asm/arch-broadwell/
A D	pch.h	14 #define GPIO_CNTL 0x4C /* LPC GPIO Control Register */ macro
/u-boot/arch/x86/cpu/ivybridge/
A D	lpc.c	499 dm_pci_write_config32(dev->parent, GPIO_CNTL, 0x10); in bd82x6x_lpc_early_init()
/u-boot/arch/x86/cpu/broadwell/
A D	pch.c	51 dm_pci_write_config8(dev, GPIO_CNTL, GPIO_EN); in broadwell_pch_early_init()

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