Searched refs:GPIO_PXINTC (Results 1 – 3 of 3) sorted by relevance
/u-boot/board/imgtec/ci20/ |
A D | ci20.c | 35 writel(0x30f00000, gpio_regs + GPIO_PXINTC(4)); in ci20_mux_mmc() 51 writel(0x04030000, gpio_regs + GPIO_PXINTC(0)); in ci20_mux_eth() 58 writel(0x0dff00ff, gpio_regs + GPIO_PXINTC(0)); in ci20_mux_eth() 63 writel(0x00000003, gpio_regs + GPIO_PXINTC(1)); in ci20_mux_eth() 77 writel(3 << 30, gpio_regs + GPIO_PXINTC(0)); in ci20_mux_jtag() 89 writel(0x002c00ff, gpio_regs + GPIO_PXINTC(0)); in ci20_mux_nand() 94 writel(0x00000003, gpio_regs + GPIO_PXINTC(1)); in ci20_mux_nand() 113 writel(0x9, gpio_regs + GPIO_PXINTC(5)); in ci20_mux_uart() 126 writel(1 << 12, gpio_regs + GPIO_PXINTC(3)); in ci20_mux_uart() 130 writel(3 << 30, gpio_regs + GPIO_PXINTC(0)); in ci20_mux_uart() [all …]
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/u-boot/arch/mips/mach-jz47xx/jz4780/ |
A D | gpio.c | 24 writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); in jz47xx_gpio_direction_input() 35 writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); in jz47xx_gpio_direction_output()
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/u-boot/arch/mips/mach-jz47xx/include/mach/ |
A D | jz4780.h | 39 #define GPIO_PXINTC(n) (0x18 + (n) * 0x100) macro
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