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Searched refs:GPLL_MODE_SHIFT (Results 1 – 13 of 13) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
A Dcru_rk3036.h85 GPLL_MODE_SHIFT = 12, enumerator
86 GPLL_MODE_MASK = 3 << GPLL_MODE_SHIFT,
A Dcru_rk3128.h94 GPLL_MODE_SHIFT = 12, enumerator
95 GPLL_MODE_MASK = 3 << GPLL_MODE_SHIFT,
A Dcru_rk322x.h89 GPLL_MODE_SHIFT = 12, enumerator
90 GPLL_MODE_MASK = 1 << GPLL_MODE_SHIFT,
A Dcru_rk3288.h185 GPLL_MODE_SHIFT = 0xc, enumerator
186 GPLL_MODE_MASK = CRU_MODE_MASK << GPLL_MODE_SHIFT,
A Dcru_rk3188.h151 GPLL_MODE_SHIFT = 12, enumerator
A Dcru_px30.h442 GPLL_MODE_SHIFT = 0, enumerator
443 GPLL_MODE_MASK = 3 << GPLL_MODE_SHIFT,
/u-boot/drivers/clk/rockchip/
A Dclk_rk3188.c239 GPLL_MODE_SHIFT in rkclk_pll_get_rate()
384 GPLL_MODE_MASK << GPLL_MODE_SHIFT | in rkclk_init()
386 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
454 GPLL_MODE_MASK << GPLL_MODE_SHIFT | in rkclk_init()
456 GPLL_MODE_NORMAL << GPLL_MODE_SHIFT | in rkclk_init()
A Dclk_rk3036.c92 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
169 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
183 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
A Dclk_rk322x.c94 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
171 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
185 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
A Dclk_rk3128.c153 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
230 GPLL_MODE_NORM << GPLL_MODE_SHIFT | in rkclk_init()
251 GPLL_MODE_SHIFT, 0xff in rkclk_pll_get_rate()
A Dclk_rk3288.c437 GPLL_MODE_SLOW << GPLL_MODE_SHIFT | in rkclk_init()
498 GPLL_MODE_NORMAL << GPLL_MODE_SHIFT | in rkclk_init()
553 GPLL_MODE_SHIFT, NPLL_MODE_SHIFT in rkclk_pll_get_rate()
A Dclk_rk3328.c80 GPLL_MODE_SHIFT = 12, enumerator
234 mode_shift = GPLL_MODE_SHIFT; in rkclk_set_pll()
A Dclk_px30.c85 NPLL_MODE_SHIFT, GPLL_MODE_SHIFT

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