Searched refs:GPMC_A1 (Results 1 – 13 of 13) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-omap5/ |
| A D | mux_dra7xx.h | 87 #define GPMC_A1 0x044 macro
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| /u-boot/board/ti/dra7xx/ |
| A D | mux_data.h | 32 {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */
224 {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */
552 {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN)}, /* gpmc_a1.vout3_d17 */
743 {GPMC_A1, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a1.vout3_d17 */
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| /u-boot/board/ti/am57xx/ |
| A D | mux_data.h | 32 {GPMC_A1, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a1.vin3a_d17 */
243 …{GPMC_A1, (M7 | PIN_INPUT_PULLUP)}, /* P9_20A: T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_…
562 {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */
782 {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */
1002 {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin1b_d1 */
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| /u-boot/board/isee/igep00x0/ |
| A D | igep00x0.h | 57 MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\
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| /u-boot/board/logicpd/omap3som/ |
| A D | omap3logic.h | 88 MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/ in set_muxconf_regs()
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| /u-boot/board/ti/am3517crane/ |
| A D | am3517crane.h | 82 MUX_VAL(CP(GPMC_A1), (M7))\
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| /u-boot/board/lg/sniper/ |
| A D | sniper.h | 53 MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M4)) /* gpio_34 */ \
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| /u-boot/board/logicpd/am3517evm/ |
| A D | am3517evm.h | 82 MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \
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| /u-boot/board/corscience/tricorder/ |
| A D | tricorder.h | 69 MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
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| /u-boot/board/technexion/tao3530/ |
| A D | tao3530.h | 69 MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) \
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| /u-boot/board/ti/evm/ |
| A D | evm.h | 88 MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\
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| /u-boot/board/timll/devkit8000/ |
| A D | devkit8000.h | 72 MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
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| /u-boot/board/ti/beagle/ |
| A D | beagle.h | 78 MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /*GPMC_A1*/\
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