Searched refs:HHI_HDMI_PHY_CNTL0 (Results 1 – 3 of 3) sorted by relevance
| /u-boot/drivers/video/meson/ |
| A D | meson_dw_hdmi.c | 39 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 */ macro
246 hhi_write(HHI_HDMI_PHY_CNTL0, 0x333d3282); in meson_dw_hdmi_phy_setup_mode()
250 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33303382); in meson_dw_hdmi_phy_setup_mode()
254 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33303362); in meson_dw_hdmi_phy_setup_mode()
258 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33604142); in meson_dw_hdmi_phy_setup_mode()
264 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33353245); in meson_dw_hdmi_phy_setup_mode()
268 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33634283); in meson_dw_hdmi_phy_setup_mode()
272 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33632122); in meson_dw_hdmi_phy_setup_mode()
278 hhi_write(HHI_HDMI_PHY_CNTL0, 0x37eb65c4); in meson_dw_hdmi_phy_setup_mode()
283 hhi_write(HHI_HDMI_PHY_CNTL0, 0x33eb6262); in meson_dw_hdmi_phy_setup_mode()
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| A D | meson_vpu_init.c | 23 #define HHI_HDMI_PHY_CNTL0 0x3a0 /* 0xe8 offset in data sheet */ macro
406 hhi_write(HHI_HDMI_PHY_CNTL0, 0); in meson_vpu_init()
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| /u-boot/arch/arm/include/asm/arch-meson/ |
| A D | clock-gx.h | 106 #define HHI_HDMI_PHY_CNTL0 0x3A0 /* 0xe8 offset in data sheet */ macro
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