Searched refs:HSI (Results 1 – 6 of 6) sorted by relevance
| /u-boot/arch/arm/mach-tegra/tegra114/ |
| A D | pinmux.c | 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
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| /u-boot/arch/arm/mach-tegra/tegra124/ |
| A D | pinmux.c | 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
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| /u-boot/arch/arm/mach-tegra/tegra30/ |
| A D | pinmux.c | 25 PIN(ULPI_DATA0_PO1, SPI3, HSI, UARTA, ULPI),
26 PIN(ULPI_DATA1_PO2, SPI3, HSI, UARTA, ULPI),
27 PIN(ULPI_DATA2_PO3, SPI3, HSI, UARTA, ULPI),
28 PIN(ULPI_DATA3_PO4, SPI3, HSI, UARTA, ULPI),
29 PIN(ULPI_DATA4_PO5, SPI2, HSI, UARTA, ULPI),
30 PIN(ULPI_DATA5_PO6, SPI2, HSI, UARTA, ULPI),
31 PIN(ULPI_DATA6_PO7, SPI2, HSI, UARTA, ULPI),
32 PIN(ULPI_DATA7_PO0, SPI2, HSI, UARTA, ULPI),
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| /u-boot/drivers/clk/ |
| A D | clk_stm32h7.c | 447 HSI, enumerator
457 [HSI] = "clk-hsi",
487 if (pllsrc == HSI) in stm32_get_rate()
511 pllsrc = stm32_get_rate(regs, HSI); in stm32_get_PLL1_rate()
662 sysclk = stm32_get_rate(regs, HSI); in stm32_clk_get_rate()
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| /u-boot/arch/arm/mach-stm32mp/ |
| A D | Kconfig | 158 # clock source is HSI on reset
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| /u-boot/doc/device-tree-bindings/clock/ |
| A D | st,stm32mp1.txt | 187 - disable HSI oscillator if the node is absent (always activated by bootrom)
224 Internally HSI clock is fixed to 64MHz for STM32MP157 SoC.
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