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Searched refs:HSOTG_CTRL_BASE_ADDR (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/usb/gadget/
A Dbcm_udc_otg_phy.c22 wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, in otg_phy_init()
32 wfld_clear(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, in otg_phy_init()
39 wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, in otg_phy_init()
52 wfld_set(HSOTG_CTRL_BASE_ADDR + HSOTG_CTRL_PHY_P1CTL_OFFSET, in otg_phy_off()
/u-boot/arch/arm/include/asm/arch-bcm235xx/
A Dsysmap.h13 #define HSOTG_CTRL_BASE_ADDR 0x3f130000 macro
/u-boot/arch/arm/include/asm/arch-bcm281xx/
A Dsysmap.h16 #define HSOTG_CTRL_BASE_ADDR 0x3f130000 macro

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