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Searched refs:HW_SSCG_SYSTEM_PLL1_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock_imx8mq.h423 #define HW_SSCG_SYSTEM_PLL1_DIV_SHIFT 0 macro
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mq.c105 pllout_div_shift = HW_SSCG_SYSTEM_PLL1_DIV_SHIFT; in decode_sscg_pll()

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