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Searched refs:ICPU_GENERAL_CTRL (Results 1 – 10 of 10) sorted by relevance

/u-boot/arch/mips/mach-mscc/
A Dreset.c16 register u32 reg = readl(BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
22 writel(reg, BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
24 reg = readl(BASE_CFG + ICPU_GENERAL_CTRL); in _machine_restart()
A Ddram.c53 clrbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, in vcoreiii_ddr_init()
56 readl(BASE_CFG + ICPU_GENERAL_CTRL); in vcoreiii_ddr_init()
/u-boot/board/mscc/common/
A Dspi.c23 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, in external_cs_manage()
28 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, in external_cs_manage()
/u-boot/board/mscc/ocelot/
A Docelot.c75 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, in board_early_init_r()
/u-boot/board/mscc/jr2/
A Djr2.c26 clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, in board_early_init_r()
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h20 #define ICPU_GENERAL_CTRL 0x24 macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h20 #define ICPU_GENERAL_CTRL 0x24 macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h20 #define ICPU_GENERAL_CTRL 0x24 macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h21 #define ICPU_GENERAL_CTRL 0x24 macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h20 #define ICPU_GENERAL_CTRL 0x24 macro

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