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Searched refs:ICPU_MEMCTRL_CFG_DDR_ECC_ENA (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h80 #define ICPU_MEMCTRL_CFG_DDR_ECC_ENA BIT(13) macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h91 #define ICPU_MEMCTRL_CFG_DDR_ECC_ENA BIT(13) macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h89 #define ICPU_MEMCTRL_CFG_DDR_ECC_ENA BIT(13) macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h97 #define ICPU_MEMCTRL_CFG_DDR_ECC_ENA BIT(13) macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h94 #define ICPU_MEMCTRL_CFG_DDR_ECC_ENA BIT(13) macro

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