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Searched refs:ICPU_MEMCTRL_CFG_MSB_ROW_ADDR (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h86 #define ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(x) (((x) << 4) & GENMASK(7, 4)) macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h97 #define ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(x) (((x) << 4) & GENMASK(7, 4)) macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h95 #define ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(x) (((x) << 4) & GENMASK(7, 4)) macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h103 #define ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(x) (((x) << 4) & GENMASK(7, 4)) macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h100 #define ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(x) (((x) << 4) & GENMASK(7, 4)) macro
/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h241 ICPU_MEMCTRL_CFG_MSB_ROW_ADDR(VC3_MPAR_row_addr_cnt - 1) | \

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