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Searched refs:ICPU_MEMCTRL_DQS_DLY_DQS_DLY (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h340 r |= ICPU_MEMCTRL_DQS_DLY_DQS_DLY(dly); in set_dly()
348 if (ICPU_MEMCTRL_DQS_DLY_DQS_DLY(r) < 31) { in incr_dly()
360 if (ICPU_MEMCTRL_DQS_DLY_DQS_DLY(r) < 31) { in adjust_dly()
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h216 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY(x) ((x) & GENMASK(4, 0)) macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h228 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY(x) ((x) & GENMASK(4, 0)) macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h254 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY(x) ((x) & GENMASK(4, 0)) macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h262 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY(x) ((x) & GENMASK(4, 0)) macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h259 #define ICPU_MEMCTRL_DQS_DLY_DQS_DLY(x) ((x) & GENMASK(4, 0)) macro

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