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Searched refs:ICPU_MEMCTRL_MR0_VAL (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h186 #define ICPU_MEMCTRL_MR0_VAL 0x258 macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h197 #define ICPU_MEMCTRL_MR0_VAL 0x138 macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h211 #define ICPU_MEMCTRL_MR0_VAL 0x130 macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h219 #define ICPU_MEMCTRL_MR0_VAL 0x158 macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h216 #define ICPU_MEMCTRL_MR0_VAL 0x138 macro
/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h793 writel(MSCC_MEMPARM_MR0, BASE_CFG + ICPU_MEMCTRL_MR0_VAL); in hal_vcoreiii_init_memctl()

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