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Searched refs:ICPU_MEMCTRL_MR1_VAL (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h188 #define ICPU_MEMCTRL_MR1_VAL 0x25c macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h199 #define ICPU_MEMCTRL_MR1_VAL 0x13c macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h213 #define ICPU_MEMCTRL_MR1_VAL 0x134 macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h221 #define ICPU_MEMCTRL_MR1_VAL 0x15c macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h218 #define ICPU_MEMCTRL_MR1_VAL 0x13c macro
/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h794 writel(MSCC_MEMPARM_MR1, BASE_CFG + ICPU_MEMCTRL_MR1_VAL); in hal_vcoreiii_init_memctl()

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