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Searched refs:ICPU_MEMCTRL_STAT (Results 1 – 8 of 8) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h496 writel(readl(BASE_CFG + ICPU_MEMCTRL_STAT), BASE_CFG + ICPU_MEMCTRL_STAT); in hal_vcoreiii_ddr_verified()
510 writel(readl(BASE_CFG + ICPU_MEMCTRL_STAT), in look_for()
511 BASE_CFG + ICPU_MEMCTRL_STAT); in look_for()
522 if (readl(BASE_CFG + ICPU_MEMCTRL_STAT) & in look_for()
550 writel(readl(BASE_CFG + ICPU_MEMCTRL_STAT), in look_past()
551 BASE_CFG + ICPU_MEMCTRL_STAT); in look_past()
560 if (readl(BASE_CFG + ICPU_MEMCTRL_STAT) & in look_past()
619 writel(readl(BASE_CFG + ICPU_MEMCTRL_STAT), in hal_vcoreiii_init_dqs()
620 BASE_CFG + ICPU_MEMCTRL_STAT); in hal_vcoreiii_init_dqs()
623 if (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT) & in hal_vcoreiii_init_dqs()
[all …]
/u-boot/arch/mips/mach-mscc/
A Ddram.c38 if (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT) in vcoreiii_ddr_init()
A Dreset.c47 while (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT) & in _machine_restart()
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h92 #define ICPU_MEMCTRL_STAT 0x23C macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h103 #define ICPU_MEMCTRL_STAT 0x118 macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h101 #define ICPU_MEMCTRL_STAT 0x110 macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h109 #define ICPU_MEMCTRL_STAT 0x138 macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h106 #define ICPU_MEMCTRL_STAT 0x118 macro

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