ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M (reference) in projects: u-boot

Searched refs:ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A D	luton_icpu_cfg.h	`130 #define ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M GENMASK(7, 4) macro`
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A D	ocelot_icpu_cfg.h	`141 #define ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M GENMASK(7, 4) macro`
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A D	serval_icpu_cfg.h	`144 #define ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M GENMASK(7, 4) macro`
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A D	jr2_icpu_cfg.h	`152 #define ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M GENMASK(7, 4) macro`
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A D	servalt_icpu_cfg.h	`149 #define ICPU_MEMCTRL_TIMING0_WR_DATA_XFR_DLY_M GENMASK(7, 4) macro`

Completed in 14 milliseconds