Searched refs:ICPU_MEMCTRL_TIMING1 (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/luton/
A D	luton_icpu_cfg.h	135 #define ICPU_MEMCTRL_TIMING1 0x24c macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A D	ocelot_icpu_cfg.h	146 #define ICPU_MEMCTRL_TIMING1 0x128 macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A D	serval_icpu_cfg.h	149 #define ICPU_MEMCTRL_TIMING1 0x120 macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A D	jr2_icpu_cfg.h	157 #define ICPU_MEMCTRL_TIMING1 0x148 macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A D	servalt_icpu_cfg.h	154 #define ICPU_MEMCTRL_TIMING1 0x128 macro
/u-boot/arch/mips/mach-mscc/include/mach/
A D	ddr.h	790 writel(MSCC_MEMPARM_TIMING1, BASE_CFG + ICPU_MEMCTRL_TIMING1); in hal_vcoreiii_init_memctl()

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