ICPU_MEMCTRL_TIMING2_MDSET_DLY (reference) in projects: u-boot

Searched refs:ICPU_MEMCTRL_TIMING2_MDSET_DLY (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/
A D	ddr.h	`275 ICPU_MEMCTRL_TIMING2_MDSET_DLY(VC3_MPAR_MD - 1) \| \ 311 ICPU_MEMCTRL_TIMING2_MDSET_DLY(VC3_MPAR_tMRD - 1) \| \`
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A D	luton_icpu_cfg.h	`160 #define ICPU_MEMCTRL_TIMING2_MDSET_DLY(x) (((x) << 24) & GENMASK(27, 24)) macro`
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A D	ocelot_icpu_cfg.h	`171 #define ICPU_MEMCTRL_TIMING2_MDSET_DLY(x) (((x) << 24) & GENMASK(27, 24)) macro`
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A D	serval_icpu_cfg.h	`174 #define ICPU_MEMCTRL_TIMING2_MDSET_DLY(x) (((x) << 24) & GENMASK(27, 24)) macro`
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A D	jr2_icpu_cfg.h	`182 #define ICPU_MEMCTRL_TIMING2_MDSET_DLY(x) (((x) << 24) & GENMASK(27, 24)) macro`
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A D	servalt_icpu_cfg.h	`179 #define ICPU_MEMCTRL_TIMING2_MDSET_DLY(x) (((x) << 24) & GENMASK(27, 24)) macro`

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