ICPU_MEMPHY_CFG_PHY_FIFO_RST (reference) in projects: u-boot

Searched refs:ICPU_MEMPHY_CFG_PHY_FIFO_RST (Results 1 – 6 of 6) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/
A D	ddr.h	`378 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset() 380 clrbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset() 664 writel(memphy_cfg \| ICPU_MEMPHY_CFG_PHY_FIFO_RST, in hal_vcoreiii_ddr_failed() 666 writel(memphy_cfg & ~ICPU_MEMPHY_CFG_PHY_FIFO_RST, in hal_vcoreiii_ddr_failed() 668 writel(memphy_cfg \| ICPU_MEMPHY_CFG_PHY_FIFO_RST, in hal_vcoreiii_ddr_failed()`
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A D	luton_icpu_cfg.h	`224 #define ICPU_MEMPHY_CFG_PHY_FIFO_RST BIT(7) macro`
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A D	ocelot_icpu_cfg.h	`236 #define ICPU_MEMPHY_CFG_PHY_FIFO_RST BIT(7) macro`
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A D	serval_icpu_cfg.h	`275 #define ICPU_MEMPHY_CFG_PHY_FIFO_RST BIT(7) macro`
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A D	jr2_icpu_cfg.h	`283 #define ICPU_MEMPHY_CFG_PHY_FIFO_RST BIT(7) macro`
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A D	servalt_icpu_cfg.h	`280 #define ICPU_MEMPHY_CFG_PHY_FIFO_RST BIT(7) macro`

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