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Searched refs:ICPU_SW_MODE_SW_SPI_CS (Results 1 – 8 of 8) sorted by relevance

/u-boot/board/mscc/common/
A Dspi.c21 ICPU_SW_MODE_SW_SPI_CS(BIT(cs)), in external_cs_manage()
/u-boot/arch/mips/mach-mscc/
A Dreset.c61 writel(ICPU_SW_MODE_SW_SPI_CS_OE(1) | ICPU_SW_MODE_SW_SPI_CS(1) | in _machine_restart()
/u-boot/drivers/spi/
A Dmscc_bb_spi.c59 ICPU_SW_MODE_SW_SPI_CS(BIT(cs)); in mscc_bb_spi_cs_activate()
/u-boot/arch/mips/mach-mscc/include/mach/luton/
A Dluton_icpu_cfg.h55 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) macro
/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h55 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h51 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h59 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h56 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) macro

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