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Searched refs:ICPU_TIMER_CTRL (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
A Docelot_icpu_cfg.h74 #define ICPU_TIMER_CTRL(x) (0x104 + 0x4 * (x)) macro
/u-boot/arch/mips/mach-mscc/include/mach/serval/
A Dserval_icpu_cfg.h69 #define ICPU_TIMER_CTRL(x) (0xfc + 0x4 * (x)) macro
/u-boot/arch/mips/mach-mscc/include/mach/jr2/
A Djr2_icpu_cfg.h77 #define ICPU_TIMER_CTRL(x) (0x124 + 0x4 * (x)) macro
/u-boot/arch/mips/mach-mscc/include/mach/servalt/
A Dservalt_icpu_cfg.h74 #define ICPU_TIMER_CTRL(x) (0x104 + 0x4 * (x)) macro
/u-boot/arch/mips/mach-mscc/include/mach/
A Dddr.h398 BASE_CFG + ICPU_TIMER_CTRL(0)); in sleep_100ns()

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