Searched refs:IOMAP_P2SB_BAR (Results 1 – 11 of 11) sorted by relevance
| /u-boot/arch/x86/include/asm/arch-apollolake/acpi/ |
| A D | gpiolib.asl | 64 Or( Or (ShiftLeft (Arg0, 16), IOMAP_P2SB_BAR),
87 (IOMAP_P2SB_BAR, ShiftLeft (Arg0, 16)), Local1), 4)
103 (IOMAP_P2SB_BAR, ShiftLeft (Arg0, 16)), Local1), 4)
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| A D | gpio.asl | 36 Or (IOMAP_P2SB_BAR, Local0, RBAS)
66 Or (IOMAP_P2SB_BAR, Local0, RBAS)
96 Or (IOMAP_P2SB_BAR, Local0, RBAS)
126 Or (IOMAP_P2SB_BAR, Local0, RBAS)
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| A D | scs.asl | 10 Or ( Or (IOMAP_P2SB_BAR,
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| /u-boot/arch/x86/include/asm/arch-apollolake/ |
| A D | iomap.h | 13 #define IOMAP_P2SB_BAR 0xd0000000 macro
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| /u-boot/doc/device-tree-bindings/pinctrl/ |
| A D | intel,apl-pinctrl.txt | 27 early-regs = <IOMAP_P2SB_BAR 0x100000>;
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| /u-boot/doc/device-tree-bindings/gpio/ |
| A D | intel,apl-gpio.txt | 27 early-regs = <IOMAP_P2SB_BAR 0x100000>;
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| /u-boot/arch/x86/include/asm/acpi/ |
| A D | pcr.asl | 15 Return (Add (IOMAP_P2SB_BAR,
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| /u-boot/arch/x86/cpu/apollolake/ |
| A D | cpu_spl.c | 92 p2sb_enable_bar(IOMAP_P2SB_BAR); in board_debug_uart_init()
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| /u-boot/doc/device-tree-bindings/ |
| A D | device.txt | 60 early-regs = <IOMAP_P2SB_BAR 0x100000>;
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| A D | chosen.txt | 161 IOMAP_P2SB_BAR IOMAP P2SB_SIZE E820_RESERVED
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| /u-boot/arch/x86/dts/ |
| A D | chromebook_coral.dts | 90 IOMAP_P2SB_BAR IOMAP_P2SB_SIZE E820_RESERVED
207 early-regs = <IOMAP_P2SB_BAR 0x100000>;
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