Searched refs:IOMUXC_BASE (Results 1 – 2 of 2) sorted by relevance
649 #define IOMUXC_BASE 0x43FAC000 macro650 #define IOMUXC_SW_MUX_CTL(x) (IOMUXC_BASE + 0xc + (x) * 4)651 #define IOMUXC_SW_PAD_CTL(x) (IOMUXC_BASE + 0x154 + (x) * 4)816 #define IOMUXC_SW_PAD_CTL_BCLK_RW_RAS (IOMUXC_BASE + 0x274)817 #define IOMUXC_SW_PAD_CTL_CS5_ECB_LBA (IOMUXC_BASE + 0x278)818 #define IOMUXC_SW_PAD_CTL_CS2_CS3_CS4 (IOMUXC_BASE + 0x27C)819 #define IOMUXC_SW_PAD_CTL_OE_CS0_CS1 (IOMUXC_BASE + 0x280)830 #define IOMUXC_SW_PAD_CTL_SD5_SD6_SD7 (IOMUXC_BASE + 0x2AC)839 #define IOMUXC_SW_PAD_CTL_A7_A8_A9 (IOMUXC_BASE + 0x2D0)840 #define IOMUXC_SW_PAD_CTL_A4_A5_A6 (IOMUXC_BASE + 0x2D4)[all …]
108 reg = IOMUXC_BASE + (mode & 0x1fc); in mx31_gpio_mux()122 reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4; in mx31_set_pad()135 struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE; in mx31_set_gpr()
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