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Searched refs:IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (Results 1 – 16 of 16) sorted by relevance

/u-boot/board/ge/mx53ppd/
A Dmx53ppd_video.c48 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, in lcd_enable()
/u-boot/board/ge/bx50v3/
A Dbx50v3.c232 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 | in setup_display_b850v3()
274 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, in setup_display_bx50v3()
/u-boot/board/engicam/imx6q/
A Dimx6q.c179 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/board/kosagi/novena/
A Dvideo.c422 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, in setup_display_clock()
/u-boot/board/technexion/pico-imx6/
A Dpico-imx6.c283 | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/board/aristainetos/
A Daristainetos.c189 | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in enable_lvds()
/u-boot/board/ge/b1x5v2/
A Db1x5v2.c301 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0, in setup_display()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dimx-regs.h422 #define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (IOMUXC_GPR2_MODE_ENABLED_DI0 << \ macro
/u-boot/board/advantech/dms-ba16/
A Ddms-ba16.c427 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 | in setup_display()
/u-boot/board/embest/mx6boards/
A Dmx6boards.c496 | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/board/freescale/mx6sabreauto/
A Dmx6sabreauto.c474 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 | in setup_display()
/u-boot/board/toradex/colibri_imx6/
A Dcolibri_imx6.c539 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/board/toradex/apalis_imx6/
A Dapalis_imx6.c632 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/board/boundary/nitrogen6x/
A Dnitrogen6x.c746 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h668 #define IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0 (IOMUXC_GPR2_MODE_ENABLED_DI0<<IOMUXC_GPR2_LVDS_CH0_… macro
/u-boot/board/gateworks/gw_ventana/
A Dgw_ventana.c497 |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; in setup_display()

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