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Searched refs:IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET (Results 1 – 4 of 4) sorted by relevance

/u-boot/board/kosagi/novena/
A Dvideo.c431 IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET) in setup_display_clock()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h563 #define IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET 8 macro
564 #define IOMUXC_GPR3_LVDS1_MUX_CTL_MASK (3<<IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET)
/u-boot/board/freescale/mx6sabresd/
A Dmx6sabresd.c458 << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); in setup_display()
/u-boot/board/congatec/cgtqmx6eval/
A Dcgtqmx6eval.c680 IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); in setup_display()

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