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Searched refs:IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_OFFSET (Results 1 – 1 of 1) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx6/
A Dimx-regs.h535 #define IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_OFFSET 26 macro
536 #define IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_MASK (1<<IOMUXC_GPR3_uSDHCx_WR_CACHE_CTL_OFFSET)

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