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Searched refs:IO_BASE_ADDRESS (Results 1 – 7 of 7) sorted by relevance

/u-boot/arch/x86/include/asm/arch-baytrail/acpi/
A Dgpio.asl28 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSCORE, RBAS)
57 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPNCORE, RBAS)
86 Add(IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSSUS, RBAS)
/u-boot/arch/x86/cpu/baytrail/
A Dearly_uart.c27 #define GPSCORE_PAD_BASE (IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSCORE)
30 #define IO_BASE_ADDRESS 0xfed0c000 macro
A Dvalleyview.c17 #define GPIO_SUS_PAD_BASE (IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSSUS)
/u-boot/arch/x86/cpu/braswell/
A Dearly_uart.c32 #define IO_BASE_ADDRESS 0xfed80000 macro
36 return IO_BASE_ADDRESS + community * 0x8000 + 0x4400 + in gpio_pconf0()
/u-boot/arch/x86/include/asm/arch-braswell/
A Diomap.h32 #define IO_BASE_ADDRESS 0xfed80000 macro
A Dgpio.h173 ((family_no != NA) ? (IO_BASE_ADDRESS + community_offset +\
207 ((mmio_offset != NA) ? (IO_BASE_ADDRESS + \
/u-boot/arch/x86/include/asm/arch-baytrail/
A Diomap.h67 #define IO_BASE_ADDRESS 0xfed0c000 macro

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