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Searched refs:K210_CLK_PLL2 (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dk210-sysctl.h17 #define K210_CLK_PLL2 5 macro
/u-boot/drivers/clk/kendryte/
A Dclk.c228 MUX_PARENTS(K210_CLK_PLL2, pll2_sels, K210_SYSCTL_PLL2, 26, 2) \
541 mux = k210_create_mux(&k210_muxes[MUXIFY(K210_CLK_PLL2)], base); in k210_clk_probe()
547 clk_dm(K210_CLK_PLL2, in k210_clk_probe()
/u-boot/doc/board/sipeed/
A Dmaix.rst550 assigned-clocks = <&sysclk K210_CLK_PLL1>, <&sysclk K210_CLK_PLL2>;

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