Searched refs:K210_SYSCTL_EN_CENT (Results 1 – 2 of 2) sorted by relevance
| /u-boot/include/dt-bindings/mfd/ |
| A D | k210-sysctl.h | 19 #define K210_SYSCTL_EN_CENT 0x28 /* Central clock enable */ macro
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| /u-boot/drivers/clk/kendryte/ |
| A D | clk.c | 163 GATE(K210_CLK_CPU, K210_SYSCTL_EN_CENT, 0) \
164 GATE(K210_CLK_SRAM0, K210_SYSCTL_EN_CENT, 1) \
165 GATE(K210_CLK_SRAM1, K210_SYSCTL_EN_CENT, 2) \
166 GATE(K210_CLK_APB0, K210_SYSCTL_EN_CENT, 3) \
167 GATE(K210_CLK_APB1, K210_SYSCTL_EN_CENT, 4) \
168 GATE(K210_CLK_APB2, K210_SYSCTL_EN_CENT, 5) \
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