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Searched refs:K210_SYSCTL_EN_PERI (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/clk/kendryte/
A Dclk.c169 GATE(K210_CLK_ROM, K210_SYSCTL_EN_PERI, 0) \
170 GATE(K210_CLK_DMA, K210_SYSCTL_EN_PERI, 1) \
171 GATE(K210_CLK_AI, K210_SYSCTL_EN_PERI, 2) \
172 GATE(K210_CLK_DVP, K210_SYSCTL_EN_PERI, 3) \
173 GATE(K210_CLK_FFT, K210_SYSCTL_EN_PERI, 4) \
174 GATE(K210_CLK_GPIO, K210_SYSCTL_EN_PERI, 5) \
175 GATE(K210_CLK_SPI0, K210_SYSCTL_EN_PERI, 6) \
176 GATE(K210_CLK_SPI1, K210_SYSCTL_EN_PERI, 7) \
177 GATE(K210_CLK_SPI2, K210_SYSCTL_EN_PERI, 8) \
178 GATE(K210_CLK_SPI3, K210_SYSCTL_EN_PERI, 9) \
[all …]
/u-boot/include/dt-bindings/mfd/
A Dk210-sysctl.h20 #define K210_SYSCTL_EN_PERI 0x2C /* Peripheral clock enable */ macro

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