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Searched refs:KS2_DDRPHY_MR1_OFFSET (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-keystone/include/mach/
A Dhardware.h45 #define KS2_DDRPHY_MR1_OFFSET 0x58 macro
/u-boot/arch/arm/mach-keystone/
A Dddr3.c56 __raw_writel(phy_cfg->mr1, base + KS2_DDRPHY_MR1_OFFSET); in ddr3_init_ddrphy()

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