Searched refs:L1CSR0_DCE (Results 1 – 3 of 3) sorted by relevance
| /u-boot/arch/powerpc/cpu/mpc85xx/ |
| A D | release.S | 128 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
129 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
134 andi. r1,r3,L1CSR0_DCE@l
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| A D | start.S | 764 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
765 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
770 andi. r1,r3,L1CSR0_DCE@l
1374 ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
1375 oris r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@h
1386 ori r4,r4,L1CSR0_DCE
1395 andi. r3,r3,L1CSR0_DCE
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| /u-boot/arch/powerpc/include/asm/ |
| A D | processor.h | 490 #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ macro
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