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Searched refs:L1CSR0_DCFI (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A Drelease.S120 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
121 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
A Dstart.S756 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
757 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
1331 ori r0,r0,L1CSR0_DCFI
/u-boot/arch/powerpc/include/asm/
A Dprocessor.h489 #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ macro

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