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Searched refs:L2CSR0_L2FI (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A Dcpu_init.c569 out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); in enable_cluster_l2()
571 & (L2CSR0_L2FI|L2CSR0_L2LFC)) != 0) in enable_cluster_l2()
688 mtspr(SPRN_L2CSR0, (L2CSR0_L2FI|L2CSR0_L2LFC)); in l2cache_init()
689 while (mfspr(SPRN_L2CSR0) & (L2CSR0_L2FI|L2CSR0_L2LFC)) in l2cache_init()
A Drelease.S265 lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
266 ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
A Dstart.S685 lis r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@h
686 ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l
/u-boot/arch/powerpc/include/asm/
A Dprocessor.h505 #define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */ macro

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