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Searched refs:L2_ENABLE (Results 1 – 5 of 5) sorted by relevance

/u-boot/drivers/cache/
A Dcache-v5l2.c38 #define L2_ENABLE 0x1 macro
81 setbits_le32(&regs->control, L2_ENABLE); in v5l2_enable()
93 if ((regs) && (readl(&regs->control) & L2_ENABLE)) { in v5l2_disable()
102 clrbits_le32(&regs->control, L2_ENABLE); in v5l2_disable()
140 if (!(ctl_val & L2_ENABLE)) in v5l2_probe()
141 ctl_val |= L2_ENABLE; in v5l2_probe()
/u-boot/arch/powerpc/cpu/mpc86xx/
A Drelease.S111 lis r3, L2_ENABLE@h
112 ori r3, r3, L2_ENABLE@l
A Dcache.S311 lis r3, L2_ENABLE@h
312 ori r3, r3, L2_ENABLE@l
/u-boot/include/configs/
A Dsbc8641d.h63 #define L2_ENABLE (L2CR_L2E) macro
A Dxpedite517x.h65 #define L2_ENABLE (L2CR_L2E) macro

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